Senior ASIC Design Engineer

We are seeking a Staff ASIC Design Engineer to develop cutting-edge IP for both ASICs and FPGAs. The ideal candidate is a strong communicator, innovative thinker, and problem solver who can analyze and resolve complex design challenges.

This is a REMOTE opportunity from anywhere in Canada.

Responsibilities

• Utilize industry best practices in ASIC development to deliver high-performance, efficient designs.
• Architect, design, and evaluate hardware solutions to meet system requirements.
• Develop and implement RTL modules using Verilog/SystemVerilog.
• Conduct simulation, hardware-based testing, debugging, and verification.
• Create and maintain scripts for automation and hardware design support.
• Apply Agile methodologies, including code reviews, sprint planning, and iterative development.

Requirements

• B.S, M.S, or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science.
• Proven track record of successful tape-outs in advanced process nodes.
• 10+ years of experience in ASIC design.
• Expertise in ASIC design methodologies, including code quality checks, synthesis, physical design, and power estimation.
• Proficiency in Verilog/SystemVerilog (preferred) or VHDL for RTL design.
• Ability to write and understand TCL/Python (experience with C/C++ is a plus).

Preferred Skills & Experience

• Deep expertise in ASIC/FPGA timing closure and physical design.
• Hands-on experience with AMBA protocols, PCIe, UCIe, and HBM is highly desirable.
• Familiarity with Agile development methodologies.
• Experience in technical leadership of small engineering teams.

If you're passionate about driving innovation in ASIC design and want to work on impactful projects, wed love to hear from you!