Senior Analog Design Engineer

Trisian-Global Consulting is seeking a Senior Design (Analog) Engineer to design and validate FET and BiCMOS circuits for high-speed broadband ICs.  

Hybrid Environment in West Lake Village, CA.

Must Haves:

• Bachelors degree in Electrical Engineering, preferably in the areas of design of high-performance RF/Analog Receiver/TIA
• 10 - 15 years experience OR MSc EE Or PhD EE with 5+ years of experience in the areas of design of high-performance RF/Analog Receiver/TIA design

Responsibilities:

• Active circuit design as well as technical leadership.
• Design leading edge transimpedance amplifier design, primarily in Silicon Germanium (SiGe) BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) technology, where circuit performance will need to transcend beyond industry leading products.
• Develop transmission line structures and other millimeter wave structures to enable higher performance than would normally be achievable.
• Design of hi-performance broadband analog circuits for optical front-end receivers.
• Design of various other analog circuits including linear regulators, AGC loop, current/voltage sensors, bandgaps etc.
• Develop microarchitecture of major circuit blocks and guide team of designers to implement them. Work with various technologies including SiGe BiCMOS and CMOS.
• Work with other functional groups to facilitate post-silicon validation, qualification, transition to mass production, and customer support.

Qualifications:

• Bachelors degree in Electrical Engineering in the areas of design of high-performance RF/Analog Receiver/TIA design
• 10 - 15 years experience Or MSc EE Or PhD EE with 5+ years of experience in the areas of design of high-performance RF/Analog Receiver/TIA design.
• Must Have:  Experience with transistor-level design of integrated circuits.
• Proven experience in IC design including chip tape-out AND lab evaluation of receiver design working in the industry).
• Solid experience in.
  
  • Using EDA CAD tools
  • Performing Analog Custom Layout
• Experience in measuring IC performance and debug of design to correlate simulations to measurements
• Deep understanding of fundamentals, including:
  
  • Detailed transistor level design
  • Device physics
  • Control/Feedback loop stability analysis
• Direct project experience in at least one of the following areas is a plus:
  
  • AGC loop design
  • High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/ADC)
  • Experience in CTLE design
• Experience in Package-System integration issues desired
• Project experience in using different technologies. (SiGe BiCMOS is a plus)
• A team-player
• Experience in the following is a strong plus:
  
  • Overseeing and mentoring junior circuit designers
  • Experience as chip lead with success in silicon
  • Experience in taking chips to mass production
  • Ability to translate chip level specifications into architecture
• Strong communication, presentation and documentation skills.