Job Openings Senior Digital Verification Engineer - Hybrid

About the job Senior Digital Verification Engineer - Hybrid

Jobbex, a company that empowers people & organizations by matching great talents to great projects is looking for the next Senior Digital Verification Engineer to help one of our clients.

Responsibilities:

    • Define and develop UVM and System Verilog based digital verification environments.
    • Standardize, develop, and document VIPs.
    • Integrate VIPs into the project's digital verification environment.
    • Define digital verification metrics for RTL and gate-level verification.
    • Create and develop test plans.
    • Automate and script digital verification processes.
    • Define, develop, and manage regression infrastructure.
    • Collaborate closely with senior digital and analog designers to develop VIP models.
    • Lead the digital verification team and supervise tasks across multiple projects.
    • Review verification metrics and results for multiple projects.
    • Design and define top-level digital verification tests.
    • Analyze and debug test results, code coverage, and functional coverage.
    • Plan, estimate, and schedule digital verification to meet tape-out dates.

Youll be a great match if you have:

        • PhD, BS, or MS in Electrical Engineering with a focus on digital design/VLSI.
        • Over 5 years of experience in both RTL and gate-level verification.
        • Proficient in digital verification languages and standards (UVM, System Verilog).
        • Advanced skills in DV areas: constraint random tests, SV assertions, coverage metrics, analog and digital DV modeling, test plans, regression analysis, and UVM DV agents.
        • Comprehensive knowledge of the entire digital design flow: specification, RTL verification, synthesis, P&R, gate-level verification, power estimation, ATPG generation, and AMS simulations.
        • Proficient with industry-standard ASIC tools and workflows: digital simulators, synthesis tools, DFT, LEC, STA, etc.
        • Excellent scripting and automation skills using TCL, Python, or C/C++.
        • Leadership skills to guide the DV team and mentor junior DV designers.
        • Embedded design and firmware development.
        • Power management industry and applications.
        • Familiarity with I2C, I3C, SPI, USB, and PMBUS.
        • Experience with GitLab.

Enthusiastic?

Apply and lets talk!