ASIC Design Engineer

We are seeking an experienced ASIC Design Engineer to develop cutting-edge IP for both ASICs and FPGAs. The ideal candidate is a strong communicator, a creative problem-solver, and a critical thinker capable of analyzing and resolving complex design challenges.

Responsibilities

• Apply industry best practices in ASIC development to deliver high-performance, best-in-class designs.
• Design, propose, and oversee the evaluation of hardware architectures.
• Develop and implement RTL modules using Verilog/SystemVerilog.
• Conduct simulation, hardware-based testing, debugging, and verification.
• Develop scripts and basic software to support hardware design.
• Utilize Agile methodologies, including code reviews, sprint planning, and iterative deployments.

Requirements

• Bachelors, Masters, or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science.
• Proven track record of successful tape-outs in advanced process nodes.
• 10+ years of experience in ASIC design.
• Expertise in ASIC design methodologies, including code quality checking, synthesis, physical design, and power estimation tools.
• Proficiency in RTL programming languages: Verilog/SystemVerilog (preferred) or VHDL.
• Ability to write and understand scripting languages such as TCL and Python (C/C++ is a plus).

Preferred Skills & Experience

• Strong background in ASIC or FPGA timing closure and physical design.
• Experience working with AMBA protocols, PCIe, UCIe, and HBM is a plus.
• Familiarity with Agile development methodologies.
• Experience leading small technical teams.

This role offers the opportunity to work on cutting-edge technology, contribute to innovative designs, and collaborate with a team of industry experts. If you are passionate about ASIC development and thrive in a fast-paced environment, we encourage you to apply!